Taiwan Semiconductor Manufacturing Company (TSMC) issued a formal update on April 13, 2026, regarding the availability of its most advanced fabrication nodes. The company confirmed that its 3-nanometer (3nm) and 2-nanometer (2nm) production lines are now fully booked through the end of 2026, with several long-term agreements extending into 2027. This development marks a significant tightening of the global semiconductor supply chain for high-performance computing and artificial intelligence applications.
TSMC Chief Executive Officer C.C. Wei stated during a technical symposium that the demand for advanced silicon has reached an unprecedented level, outpacing the company’s aggressive capacity expansion efforts. The 2nm process, which introduces the nanosheet transistor architecture, is slated for mass production in the second half of 2025. Despite the scheduled rollout, the initial production capacity for 2025 and 2026 has been entirely claimed by lead customers in the smartphone and data center sectors.
The 3nm node family, including the N3E and N3P iterations, is currently operating at maximum utilization. TSMC reported that despite bringing additional phases of its Fab 18 facility online, the backlog for 3nm wafers continues to grow. The company attributed this to the rapid integration of AI capabilities into consumer electronics and the expansion of large-scale language model training clusters.
A primary bottleneck identified in the report is the Chip on Wafer on Substrate (CoWoS) advanced packaging technology. While TSMC has tripled its CoWoS output since early 2024, the supply remains insufficient to meet the requirements of major AI accelerator designers. The company confirmed that its new advanced packaging facility in Chiayi is being fast-tracked, but it will not contribute significant volume until the first half of 2027. Current lead times for CoWoS-based products are estimated to exceed 45 weeks.
To address the shortfall, TSMC is increasing its capital expenditure for the fiscal year 2026, though specific figures were not disclosed in this briefing. The company is also prioritizing the installation of High-Numerical Aperture (High-NA) Extreme Ultraviolet (EUV) lithography machines to improve yield and throughput for future nodes.
The shortage affects a broad range of industry leaders, including Nvidia, Apple, AMD, and Broadcom, all of whom rely on TSMC’s leading-edge nodes. While TSMC’s international facilities in Arizona and Japan are beginning to scale, their current focus on 4nm and 5nm technologies does not provide immediate relief for the 3nm and 2nm supply constraints. The company concluded the update by stating that it is working closely with tool suppliers to mitigate further delays in equipment delivery.